MicroBlaze Microcontroller Reference Design
MicroBlaze? is a 32-bit RISC soft processor core that can be used with soft peripherals to design embedded systems in Xilinx FPGAs. The MicroBlaze microcontroller is an integrated solution intended for implementation of an embedded controller in the Spartan(tm)-3 FPGA using the Xilinx Embedded Development Kit (EDK) and the Xilinx Platform Studio (XPS). The MicroBlaze Microcontroller design includes an internal block RAM (BRAM) memory, an RS232 UART, 4 GPIO blocks and a JTAG UART used for software debugging. Designers can use this example reference design to understand how to use MicroBlaze as a microcontroller for applications in industrial control, consumer, and data communication.
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Gigabit System Reference Design
The MPMC is a quad port memory controller that is used to provide memory access for the PPC405 and DMA engines. The PPC405 CPU is a Harvard architecture CPU; therefore, it provides separate Processor Local Bus (PLB) ports for the instructions and data. GSRD connects the Instruction and Data MB ports to two of the ports on the MPMC.
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FPGA Motor Control Reference Design
With the growing complexity of motor and motion control applications, it becomes apparent that a Field Programmable Gate Array (FPGA) offers significant advantage over the off the shelf Application Specific Standard Product (ASSP) solutions in the areas of performance, flexibility and inventory control. With an FPGA, calculations that would normally consume large amounts of CPU time when implemented in software may be hardware accelerated. Using hardware acceleration allows for more functionality within the system software. Custom motor drive interfaces such as PWM can be developed easily, quickly and at low cost. Additionally, because of full configurability, the same FPGA can be used in various product ranges, reducing the need to maintain inventory for multiple devices.
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Digital Display Panel Reference Design
Digital displays are a fast-growing market comprising LCD, plasma, and rear projection television technologies as well as smaller displays for mobile handsets and automobiles, in addition to many other applications. Digital image processing enhances the overall viewing aesthetics of the displayed image and can differentiate your product.
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Configurable LocalLink CRC Reference Design
The Cyclic Redundancy Check (CRC) is a checksum technique for testing data reliability and correctness. This application note shows how to implement Configurable CRC Modules with LocalLink interfaces. Users tailor the module features to suit the protocol or application implemented in their system. The user-specified options for each of the configurable features are input parameters to the VHDL code for the modules. The VHDL source files for the CRC modules are coded using generate statements.
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