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Xilinx, Inc

2100 Logic Drive
San Jose, CA 95124
USA
WebSite: http://www.xilinx.com
Phone: 408-559-7778
Fax: 408-559-7114
Email: xilinxmail@xilinx.com
   

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Recent Articles for Xilinx, Inc:
Xilinx: FPGA and ARM Cortex-A9 processors make great combination
In December 2011, Xilinx started shipping samples of its Zynq-7000 family of ICs that combine an FPGA and dual . . .
Advanced FPGA features 28 Gbit/s transceivers
The Virtex-7 H580T FPGA uses stacked silicon interconnect technology to provide 580,480 logic cells plus eight 28 Gbit/s and . . .
Industry’s Highest Bandwidth FPGA EnablesWorld’s First Single-FPGA Solutionfor 400G Communications Line Cards_
To address the insatiable demand for more bandwidth,the telecommunications industry is accelerating development of Nx100G and 400G line cards . . .
FPGA design suite tackles bottlenecks
The Vivado Design Suite design environment was built from the ground up to accelerate design productivity for the next . . .
Design platforms aid Virtex-7 development
The KC705, DSP, and VC707 development kits supporting the Targeted Design Platforms approach to fast development with 28 nm . . .

Videos for Xilinx, Inc:
A look at the Extensible Processing Platform and Virtual Platform design tool
Stephane Monboisset, Senior Marketing Manager describes the Xilinx Zynq 7000
Zynq 7000 is a new class of product combines a dual-core Cortex-A9 processor and an FPGA with up to 236,000 logic cells. Available now is a new Virtual Platform design tool that is a functionally accurate model for early software design.
Xilinx’s new Kintex-7 K325T FPGA shows off its stuff
Raj Patel, Xilinx Director of Product Marketing, shows us the Kintex-7 10 Gig I/O and new analog functions in operation
The Xilinx 28 nm Kintex-7 device family features 12 Gbit/s SERDES and 12-bit A/D converters
Vidya Rajagopalan describes some facets of the Zynq FPGA/ARM platform
Vidya Rajagopalan, VP of Processing Solutions is leading the charge to put a Zynq in every product imaginable
One aspect of the Zynq extensible processing platform is software acceleration. A function you are running in the A9 processor could be off-loaded to hardware in the FPGA fabric. This gives an added dimension to programming the Zynq IC
Xilinx details new Virtex-6 FPGAs
Family yields up to 760K logic elements
We talk with Brent Przybus, marketing director at Xilinx about their new 40 nm Virtex-6 and Spartan-6 FPGAs, which feature a 15% performance boost along with a 15% power reduction.
Reference Design Documents for Xilinx, Inc:
MicroBlaze Microcontroller Reference Design
MicroBlaze? is a 32-bit RISC soft processor core that can be used with soft peripherals to design embedded systems in Xilinx FPGAs. The MicroBlaze microcontroller is an integrated solution intended for implementation of an embedded controller in the Spartan(tm)-3 FPGA using the Xilinx Embedded Development Kit (EDK) and the Xilinx Platform Studio (XPS). The MicroBlaze Microcontroller design includes an internal block RAM (BRAM) memory, an RS232 UART, 4 GPIO blocks and a JTAG UART used for software debugging. Designers can use this example reference design to understand how to use MicroBlaze as a microcontroller for applications in industrial control, consumer, and data communication.
Gigabit System Reference Design
The MPMC is a quad port memory controller that is used to provide memory access for the PPC405 and DMA engines. The PPC405 CPU is a Harvard architecture CPU; therefore, it provides separate Processor Local Bus (PLB) ports for the instructions and data. GSRD connects the Instruction and Data MB ports to two of the ports on the MPMC.
FPGA Motor Control Reference Design
With the growing complexity of motor and motion control applications, it becomes apparent that a Field Programmable Gate Array (FPGA) offers significant advantage over the off the shelf Application Specific Standard Product (ASSP) solutions in the areas of performance, flexibility and inventory control. With an FPGA, calculations that would normally consume large amounts of CPU time when implemented in software may be hardware accelerated. Using hardware acceleration allows for more functionality within the system software. Custom motor drive interfaces such as PWM can be developed easily, quickly and at low cost. Additionally, because of full configurability, the same FPGA can be used in various product ranges, reducing the need to maintain inventory for multiple devices.
Digital Display Panel Reference Design
Digital displays are a fast-growing market comprising LCD, plasma, and rear projection television technologies as well as smaller displays for mobile handsets and automobiles, in addition to many other applications. Digital image processing enhances the overall viewing aesthetics of the displayed image and can differentiate your product.
Configurable LocalLink CRC Reference Design
The Cyclic Redundancy Check (CRC) is a checksum technique for testing data reliability and correctness. This application note shows how to implement Configurable CRC Modules with LocalLink interfaces. Users tailor the module features to suit the protocol or application implemented in their system. The user-specified options for each of the configurable features are input parameters to the VHDL code for the modules. The VHDL source files for the CRC modules are coded using generate statements.