SMH4804, SMP9210, SMT4004 Telecom Reference Design
This note describes the design of a communications power system required to convert a -48V bus to multiple voltages. Guidelines and options are provided for full system design and primary-side and secondary-side configurations. The design uses a hot-swap controller, a quad power supply manager, and two dual 10-bit nonvolatile DACPOTs(tm).
|
SMM105 DC-to-DC Point-of-Load Reference Design
The SMM105 reference design contains the single-channel supply marginer and active DC output controller (ADOC[tm]), all required associated circuitry, and a PC connector for plug-and-play programming. Features include: up to 16A output; 300kHz operation; extremely accurate (+/-0.2%) ADOC, which automatically adjusts supply output voltage levels under all DC load conditions.
|
SMH4804, SMP9210, SMT4004 Telecom Reference Design (App note 25)
This note describes the design of a communications power system required to convert a -48V bus to multiple voltages. Guidelines and options are provided for full system design and primary-side and secondary-side configurations. The design uses a hot-swap controller, a quad power supply manager, and two dual 10-bit nonvolatile DACPOTs(tm).
|
SMT4004 TRAKKER(tm) Supply Manager, Xilinx Virtex(tm)-E, Spartan (tm)-IIE FPGA
This note describes how to power FPGAs for lowest possible peak currents during turn-on, while meeting all power-on guidelines set by Xilinx. Programmable options are also shown to optimize each device's individual turn-on characteristics. This ensures reliable operation. A complete schematic and list of materials is included.
|
Designing for NEBS Compliance: The SMH4804, App Note 24
The reference design employs a SMH4804 Quad Hot-Swap Controller and SMT4004 Quad Tracking Power Supply Manager tested and hardened for NEBS EMI/EMC compliance. The compliance reference circuit is based on the SMH4804 evaluation board. Design engineers are given guidelines for component selection and PCB layout practices to meet NEBS standards.
|